Working knowledge of clock synchronization using phase - lock loop ( PLL ).

理解用锁相环 ( PLL ) 实现时钟同步.

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A dither control method using phase lock technology is presented and a controller is developed.

本文提出了用锁相环跟踪抖动机构自然频率漂移的方法,设计了一种新型抖动控制器.

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The weak fluorescence of the sensor head has been detected by the phase lock amplifying technology.

采用锁相放大技术,实现了对弱荧光信号的检测.

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This paper discusses a maximum likelihood estimation of phase lock look as restrained carrier tracking loop.

讨论了锁相环作为抑制载波跟踪环的最大似然估计,并由此得到一种近似最佳的环路形式.

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Both incorporation exterior VCO and loop filter could rattling realize celerity Phase Lock function.

结合外部VCO和环路滤波器可以很好的实现快速锁相功能.

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