In March 1990 another $ 78 thousand - million was pumped into the RTC.

1990年3月给上述公司拨款780亿美元.

英汉非文学 - 政府文件

Verilog HDL design of frequency divider in RTC module is studied here.

文中研究在RTC模块中分频器设计的VerilogHDL实现.

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The method and program are given to realize interruption in 1 ms using RTC of PC.

给出了基于PC实时时钟(RTC)实现1ms硬件中断的方法与程序.

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Loss of chip power will result in complete loss of all RTC register contents.

芯片的断电将使RTC寄存器的内容完全丢失.

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So far, the most complete, most detailed notes RTC driver, precision timing module.

目前为止, 最为完整, 注释最为详细的RTC驱动程序, 精确定时模块.

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