The design verification measures shall be recorded.

设计查证措施应予记录.

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Design circuit for SoC ( System on Chip ) design verification in FPGA prototype phase and product phase.

设计电路用于片上系统的设计验证,包括FPGA原型阶段和产品阶段.

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However, the complexity of the design verification exponential with the increase of the chip scale.

但是, 设计验证的复杂度随着芯片的规模增大呈指数增加.

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